Intel® Stratix® 10 Configuration User Guide

ID 683762
Date 5/30/2022
Public
Document Table of Contents

3.1.7.3.3. Creating a Single PFL II IP for Programming and Configuration

Follow these steps to create a single PFL II IP instantiation for programming and configuration control:
  1. In the IP Catalog locate the Parallel Flash Loader II Intel FPGA IP.
  2. On the General tab for What operating mode will be used, select Flash Programming and FPGA Configuration.
  3. In the same tab, for What is the targeted flash?, select CFI Parallel Flash.
  4. Specify the parameters on the Flash Interface Settings tab:
    1. Select 1 for a single flash device.
    2. Select CFI 1 Gbit as the largest used flash device.
    3. Select 16 bits for the flash interface data width.
  5. Specify the parameters on the FPGA Configuration to match your design.
  6. Compile and generate a .pof for the flash memory device. Ensure that you tri-state all unused I/O pins.

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