Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

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8.2.1.5.1. Memory Map Remap Bits

Table 47.  Remap Bit Usage
remap0 remap1 0x00000000 (MPU Master Interface) 0x00000000 (Non-MPU Master Interfaces) 0xFFE00000 (All Maps) 0xFFFC0000 (MPU & DAP)
0 0 Boot ROM SDRAM On-Chip RAM Boot ROM
0 1 Invalid setting
1 0 SDRAM SDRAM On-Chip RAM Boot ROM
1 1 On-Chip RAM On-Chip RAM On-Chip RAM Boot ROM

L2 filter registers in the MPU subsystem, not the interconnect, allow the SDRAM to be remapped to address 0x0 for the MPU.