Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

16.4.13.2. SRAM Initialization Procedure with ECC Enabled

  1. Set 0x40 (default) to srampart register (SRAM_PARTITION_REG).
  2. Enable ECC.
  3. Fill up the read partition in indirect read transfer mode. Confirm sramfill.Indrdpart register is 0x41.
  4. Fill up and initialize the write partition in indirect operation. Confirm sramfill.Indwrpart register is 0x40.
  5. Clear ECC interrupt status register.
  6. Enable ECC interrupt.
Note: SRAM Partition Configuration Register defines the size of the indirect read partition in the SRAM. By default, half of the SRAM is reserved for indirect read operation, and half for indirect write.

The number of locations allocated to indirect read = SRAM_PARTITION_REG + 1.

The number of locations allocated to indirect write = 128 - SRAM_PARTITION_REG.