Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

20.1. Features of the SPI Controller

The SPI controller has the following features: †

  • Serial master and serial slave controllers – Enable serial communication with serial‑master or serial‑slave peripheral devices. †
  • Each SPI master has a maximum bit rate of 60Mbps
  • Each SPI slave has a maximum bit rate of 50Mbps
  • Serial interface operation – Programmable choice of the following protocols:
    • Motorola SPI protocol
    • Texas Instruments Synchronous Serial Protocol
    • National Semiconductor Microwire
  • DMA controller interface integrated with HPS DMA controller
  • SPI master supports received serial data bit (RXD) sample delay
  • Transmit and receive FIFO buffers are 256 words deep
  • SPI master supports up to four slave selects
  • Programmable master serial bit rate
  • Programmable data item size of 4 to 16 bits
  • Support for Multi-master mode