Visible to Intel only — GUID: suc1415150186361
Ixiasoft
Visible to Intel only — GUID: suc1415150186361
Ixiasoft
A.6.4. Loading the Second-Stage Boot Loader Image
The boot ROM code loads the image from flash memory into the on-chip RAM and passes control to the second-stage boot loader. The boot ROM code checks for a valid image by verifying the header and cyclic redundancy check (CRC) in the second-stage boot loader image.
The maximum second-stage boot loader size is 208 KB with authentication and 224 KB without. This size is limited by the on-chip RAM size of 256 KB, where 48KB or 32 KB is reserved as a workspace for the boot ROM data and stack depending on whether authentication is enabled or not. The second-stage boot loader can use this reserved region (for its stack and data, for example) after the boot ROM code passes control to the second-stage boot loader. This reserved region is overwritten by the boot ROM code on a subsequent reset. The following figure shows the second-stage boot loader image layout in the on-chip RAM after being loaded from the boot ROM.
- Exception vectors—Exception vectors are located at the start of the on-chip RAM. Typically, the second-stage boot loader remaps the lowest region of the memory map to the on-chip RAM (from the boot ROM) to create easier access to the exception vectors.
- Header—contains information such as validation word, version, flags, program length, security settings,and checksum for the boot ROM code to validate the second-stage boot loader image before passing control to the second-stage boot loader.
- Version—This byte describes the version and layout of the program header. This value must be 0x1.
- Flags— Not used.
- Header length— The length of the header in bytes.
- Image length — The total length of the image (including the exception vectors and the CRC field)
- Program entry offset— The boot ROM jumps to this offset. The offset value is in bytes from the start of the program header (0xFFE00040).
- Reserved —Not used. Must be set to 0x0.
- Checksum— A simple checksum of all the bytes from 0xFFE00040 to 0xFFE00051, inclusive
- Program — Program contents which typically includes U-Boot binary and U-Boot Device Tree Blob (DTB).
- CRC—There is a CRC value for the entire image. The CRC consists of data located from address 0xFFFE0000 to 0xFFFE0000+(Image Length)–0x0004. The polynomial used to validate the image is:
x 32 + x 26 + x 23 + x 22 + x 16 + x 12 + x 11 + x 10 + x 8 + x 7 + x 5 + x 4 + x 2 + x + 1
There is no reflection of the bits. The initial value of the remainder is 0xFFFFFFFF and the final value is XORed with 0xFFFFFFFF.