Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 1/10/2023
Public

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Document Table of Contents

8.2.9.2. Functional Description of the SDRAM Adapter

The SDRAM adapter connects the SDRAM scheduler with the Hard Memory Controller.

The SDRAM adapter provides the following functionality:

  • ECC generation, detection, and correction
  • Operates at memory half rate
    • Matches interface frequency of the single port memory controller in the FPGA
    • Connectivity to the MPU, main L3 interconnect, and FPGA undergo clock crossing