ID 683620
Date 10/28/2016
Public

## 8.5.68. mulxuu

 Instruction multiply extended unsigned/unsigned Operation rC ←  ((unsigned) rA) x ((unsigned) rB)) 63..32 Assembler Syntax mulxuu rC, rA, rB Example mulxuu r6, r7, r8 Description Treating rA and rB as unsigned integers, mulxuu multiplies rA times rB and stores the 32 high-order bits of the product to rC. Nios® II processors that do not implement the mulxuu instruction cause an unimplemented instruction exception. Usage Use mulxuu and mul to compute the 64-bit product of two 32-bit unsigned integers. Furthermore, mulxuu can be used as part of the calculation of a 128-bit product of two 64-bit signed integers. Given two 64-bit signed integers, each contained in a pair of 32-bit registers, (S1 : U1) and (S2 : U2), their 128-bit product is (U1 x U2) + ((S1 x U2) << 32) + ((U1 x S2) << 32) + ((S1 x S2) << 64). The mulxuu and mul instructions are used to calculate the 64-bit product U1 x U2. mulxuu also can be used as part of the calculation of a 128-bit product of two 64-bit unsigned integers. Given two 64-bit unsigned integers, each contained in a pair of 32-bit registers, (T1 : U1) and (T2 : U2), their 128-bit product is (U1 x U2) + ((U1 x T2) << 32) + ((T1 x U2) << 32) + ((T1 x T2) << 64). The mulxuu and mul instructions are used to calculate the four 64-bit products U1 x U2, U1 x T2, T1 x U2, and T1 x T2. Exceptions Unimplemented instruction Instruction Type R Instruction Fields A = Register index of operand rA B = Register index of operand rB C = Register index of operand rC
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
A B C 0x07
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x07 0 0x3a