Nios II Classic Processor Reference Guide

ID 683620
Date 10/28/2016
Document Table of Contents

4.5.3. Break Vector

When the Nios II processor contains a JTAG debug module, Qsys determines a break vector (break address). Break vector memory is always the processor core you are configuring. Break vector offset is fixed at 0x20. Qsys calculates the physical address of the break vector from the memory module’s base address and the offset.

When the Nios II processor does not contain a JTAG debug module, you can edit the break vector parameters in the manner described in General Exception Vector” section.

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