Nios II Classic Processor Reference Guide

ID 683620
Date 10/28/2016
Document Table of Contents Memory Protection

The Nios® II MMU maintains read, write, and execute permissions for each page. The TLB provides the permission information when translating a VPN. The operating system can control whether or not each process is allowed to read data from, write data to, or execute instructions on each particular page. The MMU also controls whether accesses to each data page are cacheable or uncacheable by default.

Whenever an instruction attempts to access a page that either has no TLB mapping, or lacks the appropriate permissions, the MMU generates an exception. The Nios® II processor’s precise exceptions enable the system software to update the TLB, and then re-execute the instruction if desired.