Intel® Stratix® 10 Hard Processor System Component Reference Manual

ID 683516
Date 8/05/2021
Public
Document Table of Contents

2.5. I/O Delays

The I/O Delays tab is the fourth of five tabs in the HPS component that allows you to add an optional delay chain to the input or output of any of the 48 HPS dedicated I/O pins. Each dropdown allows you to select between the following options for the corresponding I/O pin:
  • Zero_chain_dly—input or output signal bypasses the delay chain
  • Chain_dly—input or output signal goes through the minimum delay chain path
  • One_chain_dly to fifteen_chain_dly—input or output signal goes through between one to fifteen chain delays, in addition to the minimum delay chain path

For more information about the delay timings, refer to the Intel® Stratix® 10 Device Datasheet.

Did you find the information on this page useful?

Characters remaining:

Feedback Message