Intel® Stratix® 10 Hard Processor System Component Reference Manual

ID 683516
Date 8/05/2021
Public
Document Table of Contents

2.2.1.1. Enable MPU Standby and Event Interfaces

Microprocessor Unit (MPU) standby signals are notification signals to the FPGA fabric that the MPU is in standby. Event signals wake up the Cortex*-A53 processors from a wait-for-event (WFE) state. Turning on the Enable MPU Standby and Event Interfaces option enables the h2f_mpu_events conduit, which is comprised of the following signals:
  • h2f_mpu_eventi—Input for FPGA to signal events to all processors. This FPGA-to-HPS signal is used to wake up a processor that is in a WFE state. Asserting this signal has the same effect as executing the SEV instruction in the Cortex*-A53. You must deassert the signal until the FPGA fabric configures. You must assert the signal high for at least two MPU clock cycles for the processor to recognize any of the Cortex*-A53 cores.
  • h2f_mpu_evento—Output from any MPU core into the FPGA fabric. This HPS-to-FPGA signal is asserted when an SEV instruction is executed by one of the Cortex*-A53 processors. This signal is output as a multiple cycle pulse so logic in the FPGA should use a rising edge detector circuit to detect the occurrence of the event.
  • h2f_mpu_standbywfe[3:0]—Output per processor that indicates if the processor is in WFE standby mode. When high, the processor is in WFE standby mode.
  • h2f_mpu_standbywfi[3:0]—Output per processor that indicates if the processor is in the wait-for-interrupt (WFI) standby mode. When the logic level is high, the processor is in WFI standby mode.

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