Intel® Stratix® 10 Hard Processor System Component Reference Manual

ID 683516
Date 8/05/2021
Public
Document Table of Contents

2.2.1.4. Enable System Trace Macrocell (STM) Hardware Events

The system trace microcell hardware events interface allows logic in the FPGA to insert messages into the trace stream.

For more information about the System Trace Macrocell Hardware Events interface, refer to the “CoreSight Debug and Trace” chapter in the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.

Turning on the Enable System Trace Macrocell Hardware Events option enables the f2h_stm_hw_events conduit, which is comprised of the single bus f2h_stm_hwevents[42…0].

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