Intel® Stratix® 10 Hard Processor System Component Reference Manual

ID 683516
Date 8/05/2021
Public
Document Table of Contents

2.4. SDRAM

The SDRAM tab is the third of five tabs in the HPS component that consists of a single option, External Memory Interface for HPS Intel® Stratix® 10 FPGA IP. This enables the HPS dedicated conduit to the Intel® Stratix® 10 External Memory Interface for HPS. This conduit cannot connect to any other External Memory Interface (EMIF) IP. Only the Intel® Stratix® 10 External Memory Interface for HPS Platform Designer IP should be used.

The HPS supports one memory interface implementing double data rate 3 (DDR3), double data rate 3 Low Voltage (DDR3L), and double data rate 4 (DDR4) protocols.

Did you find the information on this page useful?

Characters remaining:

Feedback Message