Intel® Quartus® Prime Pro Edition User Guide: Partial Reconfiguration

ID 683834
Date 1/11/2022
Public

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3.2.6. Secure Device Manager Firmware Error Reporting

The Partial Reconfiguration Controller Intel® FPGA IP notifies you of a non-specific error in PR operation by updating the 3-bit status CSR port to a generic PR_ERROR or "Incompatible bitstream error” in the PR controller IP. However, this error notification does not include specific details about the nature of the error.

As the secure device manager (SDM) firmware processes the PR bitstream, the SDM firmware error reporting can provide details about the error, such as the PR stage where the error occurs. You can use this information to identify and resolve any issue before re-attempting another PR operation on the PR region that remains isolated from an initial, failed PR attempt. If the SDM firmware reports no error, then the PR error is outside of the SDM firmware.

Note: SDM firmware error reporting is only supported for Intel® Agilex™ devices.

PR IP in Avalon Streaming Mode with SDM Firmware Error Reporting Enabled shows the IP in Avalon streaming mode with SDM firmware error reporting enabled. Enabling this parameter adds the pr_fw_handshake[7:0] and pr_fw_response[31:0] ports to the IP.

Figure 49. PR IP in Avalon Streaming Mode with SDM Firmware Error Reporting Enabled

Similarly, PR IP in Avalon Memory-Mapped Mode with SDM Firmware Error Reporting Enabled shows the IP in Avalon memory-mapped mode with SDM firmware error reporting enabled by the PR_FW_HANDSHAKE[0x3] and PR_FW_RESPONSE[0x4] CSR registers of the Avalon memory-mapped register map. Enabling this parameter adds no additional ports.

Figure 50. PR IP in Avalon Memory-Mapped Mode with SDM Firmware Error Reporting Enabled

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