Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

ID 683645
Date 11/06/2017
Document Table of Contents

3.7. Guaranteed Timing Closure

One of the key features of the Intel® FPGA SDK for OpenCL™ is that it abstracts away hardware details, such as timing closure, for software developers. Both the SDK and the Custom Platform contribute to the implementation of the SDK's guaranteed timing closure feature. The SDK provides IP to generate the kernel clock, along with a post-flow script that ensures this clock is configured with a safe operating frequency confirmed by timing analysis. The Custom Platform imports a post-fit netlist that has already achieved timing closure on all nonkernel clocks.