Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

ID 683645
Date 11/06/2017
Public
Document Table of Contents

1.1. Stratix V Network Reference Platform: Prerequisites

The Stratix V Network Reference Platform Porting Guide assumes that you are an experienced FPGA designer who is familiar with Intel® 's FPGA design tools and concepts.

These design tools and concepts include:

  • FPGA architecture, including clocking, global routing and I/Os
  • High-speed design
  • Timing analysis
  • Intel® Quartus® Prime software
  • Platform Designer (Standard) design and Avalon® interfaces
  • Tcl scripting
  • Designing with Logic Lock regions
  • PCI Express* ( PCIe* )
  • DDR3 external memory