Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide
ID
683645
Date
11/06/2017
Public
2.1. Initializing Your Custom Platform
2.2. Removing Unused Hardware
2.3. Integrating Your Custom Platform with the Intel® FPGA SDK for OpenCL™
2.4. Setting up the Software Development Environment
2.5. Building the Software in Your Custom Platform
2.6. Establishing Host Communication
2.7. Connecting the Memory
2.8. Integrating an OpenCL Kernel
2.9. Programming Your FPGA Quickly Using CvP
2.10. Guaranteeing Timing Closure
2.11. Troubleshooting
3.1. Host-FPGA Communication over PCIe
3.2. DDR3 as Global Memory for OpenCL Applications
3.3. QDRII as Heterogeneous Memory for OpenCL Applications
3.4. Host Connection to OpenCL Kernels
3.5. Implementation of UDP Cores as OpenCL Channels
3.6. FPGA System Design
3.7. Guaranteed Timing Closure
3.8. Addition of Timing Constraints
3.9. Connection to the Intel® FPGA SDK for OpenCL™
3.10. FPGA Programming Flow
3.11. Host-to-Device MMD Software Implementation
3.12. OpenCL Utilities Implementation
3.13. Stratix V Network Reference Platform Implementation Considerations
3.1.4. Definitions of Hardware Constants in Software Header Files
After you build the PCIe® component in your hardware design, you need a software layer to communicate with the board via PCIe. To enable communication between the board and the host interface, define the hardware constants for the software in header files.
The Stratix® V Network Reference Platform includes three header files that describe the hardware design to the software. The location of these header files are as follows:
- For Linux systems, the location is <path_to_s5_net>/linux64/driver
- For Windows systems, the location is <path_to_s5_net>\source\include
Header File Name | Description |
---|---|
hw_pcie_constants.h | Header file that defines most of the hardware constants for the board design. Example constants in this file include the IDs described in the PCIe Device Identification Registers section, BAR number, and offset for different components in your design. In addition, this header file also defines the name strings of ACL_BOARD_PKG_NAME, ACL_VENDOR_NAME and ACL_BOARD_NAME. Keep the information in this file in sync with any changes to the board design. |
hw_pcie_dma.h | Header file that defines direct memory access (DMA)-related hardware constants. Refer to SG-DMA for more information. |
hw_pcie_cvp_constants.h | Header file that defines CvP-related hardware constants. Refer to CvP for more information. |