2.1. Initializing Your Custom Platform 2.2. Removing Unused Hardware 2.3. Integrating Your Custom Platform with the Intel® FPGA SDK for OpenCL™ 2.4. Setting up the Software Development Environment 2.5. Building the Software in Your Custom Platform 2.6. Establishing Host Communication 2.7. Connecting the Memory 2.8. Integrating an OpenCL Kernel 2.9. Programming Your FPGA Quickly Using CvP 2.10. Guaranteeing Timing Closure 2.11. Troubleshooting
3.1. Host-FPGA Communication over PCIe 3.2. DDR3 as Global Memory for OpenCL Applications 3.3. QDRII as Heterogeneous Memory for OpenCL Applications 3.4. Host Connection to OpenCL Kernels 3.5. Implementation of UDP Cores as OpenCL Channels 3.6. FPGA System Design 3.7. Guaranteed Timing Closure 3.8. Addition of Timing Constraints 3.9. Connection to the Intel® FPGA SDK for OpenCL™ 3.10. FPGA Programming Flow 3.11. Host-to-Device MMD Software Implementation 3.12. OpenCL Utilities Implementation 3.13. Stratix V Network Reference Platform Implementation Considerations
2.8. Integrating an OpenCL Kernel
After you establish host communication and connect the external memory, test the FPGA programming process from kernel creation to program execution.
- Perform the steps outlined in INTELFPGAOCLSDKROOT/board/custom_platform_toolkit/tests/README.txt file to build the hardware configuration file from the INTELFPGAOCLSDKROOT/board/custom_platform_toolkit/tests/boardtest/boardtest.cl kernel source file.
The environment variable INTELFPGAOCLSDKROOT points to the location of the Intel® FPGA SDK for OpenCL™ installation.
- Program your FPGA device with the boardtest.aocx Intel® FPGA SDK for OpenCL™ Offline Compiler executable file and reboot your machine.
- Remove the early-exit modification in the version_id_test function in the <your_custom_platform_name>/source/host/mmd/acl_pcie_device.cpp file that you implemented when you established communication between the board and the host interface.
- Invoke the aocl diagnose <device_name> command, where <device_name> is the string you define in your Custom Platform to identify each board.
By default, <device_name> is the acl number (for example, acl0 to acl31) that corresponds to your FPGA device. In this case, invoke the aocl diagnose acl0 command.
- Build the boardtest host application. The .sln file for Windows and the Makefile for Linux are available in the INTELFPGAOCLSDKROOT/board/custom_platform_toolkit/tests/boardtest directory.
Attention: You must modify the .sln file to link it against the MMD library in your Custom Platform.
- Set the environment variable CL_CONTEXT_COMPILER_MODE_INTELFPGA to a value of 3.
For more information on this environment variable, refer to Troubleshooting.
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