Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

ID 683645
Date 11/06/2017
Document Table of Contents

3.5. Implementation of UDP Cores as OpenCL Channels

OpenCL™ kernels can communicate directly with I/O using the Intel® FPGA SDK for OpenCL™ channels extension.

For the Stratix® V Network Reference Platform, Intel® uses the PLDA QuickUDP IP to implement a full UDP stack on top of the available 10 GbE channels on the card. QuickUDP provides an Avalon®-ST interface that can connect directly to the OpenCL kernel, allowing it to send and receive UDP network traffic without concern for UDP or lower-level protocols.

Attention: The UDP Hardware Stack QuickUDP IP is a licensed IP from PLDA. Refer to the PLDA website for information on acquiring and installing the appropriate license.

Improper installation of the QuickUDP IP license causes the SDK users to encounter the following error message when they compile with a Custom Platform that contains the QuickUDP IP:

Error (292014): Can't find valid feature line for core PLDA QUICKTCP (73E1_AE12) in current license.

The error has no actual dependency on the PLDA QuickTCP IP.