Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

ID 683645
Date 11/06/2017
Document Table of Contents

3.2. DDR3 as Global Memory for OpenCL Applications

The Stratix® V Network Reference Platform targets a computing card that has two banks of 4 GB x72 DDR3-160 SDRAM.
Completion of the tasks below are necessary to access these banks as global memory for OpenCL™ applications.

For more information on the DDR3 UniPHY IP, refer to the DDR2, DDR3, and DDR4 SDRAM Board Design Guidelines section in Volume 2 of the External Memory Interface Handbook.