Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide
ID
683645
Date
11/06/2017
Public
2.1. Initializing Your Custom Platform
2.2. Removing Unused Hardware
2.3. Integrating Your Custom Platform with the Intel® FPGA SDK for OpenCL™
2.4. Setting up the Software Development Environment
2.5. Building the Software in Your Custom Platform
2.6. Establishing Host Communication
2.7. Connecting the Memory
2.8. Integrating an OpenCL Kernel
2.9. Programming Your FPGA Quickly Using CvP
2.10. Guaranteeing Timing Closure
2.11. Troubleshooting
3.1. Host-FPGA Communication over PCIe
3.2. DDR3 as Global Memory for OpenCL Applications
3.3. QDRII as Heterogeneous Memory for OpenCL Applications
3.4. Host Connection to OpenCL Kernels
3.5. Implementation of UDP Cores as OpenCL Channels
3.6. FPGA System Design
3.7. Guaranteed Timing Closure
3.8. Addition of Timing Constraints
3.9. Connection to the Intel® FPGA SDK for OpenCL™
3.10. FPGA Programming Flow
3.11. Host-to-Device MMD Software Implementation
3.12. OpenCL Utilities Implementation
3.13. Stratix V Network Reference Platform Implementation Considerations
3.7.2. Guarantee Kernel Clock Timing
The OpenCL Kernel Clock Generator works together with a script that the Intel® Quartus® Prime database interface executable (quartus_cdb) runs after every Intel® Quartus® Prime software compilation as a post-flow script.
The following setting in the base.qsf and top.qsf files invokes the <path_to_s5_net>/hardware/s5_net/scripts/post_flow.tcl Tcl script in the Stratix® V Network Reference Platform after every Intel® Quartus® Prime software compilation using quartus_cdb:
set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_cdb:scripts/post_flow.tcl"Within this script, the following statement calls the OpenCL™ script to determine and configure the kernel clock to a functional frequency:
source $::env(INTELFPGAOCLSDKROOT)/ip/board/bsp/adjust_plls.tclwhere INTELFPGAOCLSDKROOT points to the path to the Intel® FPGA SDK for OpenCL™ installation.
Important: Ensure that this flow executes during every Intel® Quartus® Prime software compilation of an OpenCL kernel.