Nios II Classic Processor Reference Guide

ID 683620
Date 10/28/2016
Public
Document Table of Contents

2.3.3.2. Floating Point Custom Instruction Component

The Floating Point Hardware component supports addition, subtraction, multiplication, and (optionally) division. The Floating Point Hardware parameter editor allows you to omit the floating-point division hardware for cases in which code running on your hardware design does not make heavy use of floating-point division. When you omit the floating-point divide instruction, the Nios II compiler implements floating-point division in software.

In Qsys, the Floating Point Hardware component is under Embedded Processors on the Component Library tab.

The Nios II floating-point custom instructions are based on the Altera® floating-point megafunctions: ALTFP_MULT, ALTFP_ADD_SUB, and ALTFP_DIV.

The Nios II software development tools recognize C code that takes advantage of the floating-point instructions present in the processor core. When the floating-point custom instructions are present in your target hardware, the Nios II compiler compiles your code to use the custom instructions for floating-point operations and the newlib math library.