Arria® V Device Handbook: Volume 2: Transceivers

ID 683573
Date 5/29/2020
Document Table of Contents Byte Serializer

The byte serializer allows the transmitter channel to operate at higher data rates in a configuration that exceeds the FPGA fabric–transceiver interface frequency limit.

The byte serializer supports operation in single- and double-width modes. The datapath clock rate at the output of the byte serializer is twice the FPGA fabric–transmitter interface clock frequency. The byte serializer forwards the least significant word first followed by the most significant word.

Note: You must use the byte serializer in configurations that exceed the maximum frequency limit of the FPGA fabric–transceiver interface.
Table 18.  Transmitter Input Datapath Conversion
Mode Transmitter Input Datapath Width Byte Serializer Output Datapath Width Byte Serializer Output Ordering
Single Width 16 8 Least significant 8 bits of the 16-bit input first
20 10 Least significant 10 bits of the 20-bit input first
Double Width 32 16 Least significant 16 bits of the 32-bit input first
40 20 Least significant 20 bits of the 40-bit input first