Arria 10 SoC Development Kit User Guide

ID 683227
Date 8/09/2018
Document Table of Contents

5.9.9. SFP+

The development board include two SFP+ ports that use two transceiver channels from the FPGA. These ports take in serial data from the FPGA and transforms it into optical signals. Both SFP+ ports are active and include the SFP+ cage assembly.

Table 40.  SFP+ FPGA Transceiver Pin Assignments
FPGA Pin Assignment Schematic Signal Name Direction Description
AW36 SFPB_TX_N Output SFP+ B Transmitter
AW37 SFPB_TX_P Output SFP+ B Transmitter
AT30 SFPB_RX_N Input SFP+ B Receiver
AT31 SFPB_RX_P Input SFP+ B Receiver
AW32 SFPA_TX_N Output SFP+ A Transmitter
AW33 SFPA_TX_P Output SFP+ A Transmitter
AU32 SFPA_RX_N Input SFP+ A Receiver
AU33 SFPA_RX_P Input SFP+ A Receiver
AR29 LMK_SFPCLK_P Input SFP+ clock reference from clock cleaner
AR28 LMK_SFPCLK_N Input SFP+ clock reference from clock cleaner

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