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Ixiasoft
5.9.1. PCI Express
5.9.2. 10/100/1000 Ethernet (HPS)
5.9.3. 10/100/1000 Ethernet (FPGA)
5.9.4. FMC
5.9.5. HPS Shared I/O
5.9.6. USB 2.0 Port (HPS)
5.9.7. RS-232 UART (HPS)
5.9.8. Real-Time Clock (HPS)
5.9.9. SFP+
5.9.10. I2C Interface
5.9.11. FPGA General I/O Configuration
5.9.12. HPS SPIO Interface
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Ixiasoft
5.6. Setup Elements
The development board includes several different kinds of setup elements. This section describes the following setup elements:
- Board settings DIP switch
- JTAG chain control DIP switch
- FPGA configuration mode DIP switch
- HPS jumpers
- CPU reset push button
- Logic reset push button
- Program configuration push button
- Program select push button
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