Arria 10 SoC Development Kit User Guide

ID 683227
Date 8/09/2018
Document Table of Contents

5.6.5. Logic Reset Push Button

The logic reset push button (S10) is an input to the MAX V CPLD 5M2210 System Controller. This push button is the default reset for the CPLD logic and FPGA.

Did you find the information on this page useful?

Characters remaining:

Feedback Message