Intel® Arria® 10 SoC Development Kit User Guide

ID 683227
Date 2/21/2024
Public
Document Table of Contents

5.9.10. I2C Interface

There is an I2C buffer connected to I2C port 1. The enable pin of the I2C buffer is controlled by the MAX V A10I2CEN. The HPS must set A10I2CEN to logic 1 before accessing the I2C devices shown in Table 39.

Figure 36. I2C Bus Connection
Table 39.  I2C Device Address
Address Device
0x14, 0x16 LT2497 ADC
0x51 24LC32A EEPROM
0x68 DS1339C Real time clock circuit
0x4C MAX1619 Temp monitor
0x71, 0x70, 0x73 Si5338 clock generators
0x5C LTC2977 power management
0x42 0.9V LTM4677 power controller
0x0E 3.3VLTM4676A power controller
0x28 LCD