Intel® Arria® 10 SoC Development Kit User Guide

ID 683227
Date 7/12/2023
Document Table of Contents

5.4.3. FPGA Programming by HPS

The default method is to use the factory design—Golden Hardware Reference Design (GHRD).

Table 21.  HPS FPGA Configuration
Configuration Switch Position
HPS FPGA SW4.4:OFF(Down)=MSEL2 is 0
SW4.3:OFF(Down)=MSEL1 is 0
SW4.2:OFF(Down)=MSEL0 is 0
Table 22.  AS Configuration
Configuration Switch Position
Active Serial (AS) SW4.4:OFF(Down)=MSEL2 is 0
SW4.3:ON(Up)=MSEL1 is 1
SW4.2:ON(Up)=MSEL0 is 1

On power-up or by pressing the warm/cold reset push button, the HPS downloads the GHRD design from boot flash to configure the FPGA. The D17 (Error LED) is turned off and D18 (Configuration done LED) is turned on after the FPGA is configured.

By default the FPGA is configured by the HPS.

Refer to the GSRD User Manual for more information.

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