Intel® Arria® 10 SoC Development Kit User Guide

ID 683227
Date 2/21/2024
Document Table of Contents

5.4.1. System Controller Configuration

J58 is used to turn off the FPGA power. The following table lists the status of each J58 configuration.

Table 16.  J58 Jumper Settings
Board Reference Description
  • OPEN: Normal application
  • SHORT: No power to FPGA
The MAX V system controller controls the power sequence. The wrong configuration file may damage the board.

The following procedure must be followed to program the system controller MAX V:

  1. Short J58
  2. Set SW3 Bits to:
    Table 17.  SW3 System Configuration Mode for System Controller MAX V Programming
    Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8

  3. Turn on the power; the red LED will be flashing
  4. Connect the USB cable to the on-board Intel® FPGA Download Cable II
  5. Use “autodetect” in Intel® Quartus® Prime to detect MAX V
  6. Click Change File and select \examples\max5\PRD\system_max5\system_max5.pof
  7. Turn on Program/Configure option for the selected .pof file, click Start to download it to MAX V. Configuration is complete when the progress bar reaches 100%
  8. Turn off the power and remove J58
  9. Set SW3 to normal operation mode

    Refer to the Table 3-4 in Default Switch and Jumper Settings for SW3 configuration.

  10. Turn on the power; the red LED will be on until the FPGA is configured