Visible to Intel only — GUID: iga1438035661285
Ixiasoft
5.9.1. PCI Express
5.9.2. 10/100/1000 Ethernet (HPS)
5.9.3. 10/100/1000 Ethernet (FPGA)
5.9.4. FMC
5.9.5. HPS Shared I/O
5.9.6. USB 2.0 Port (HPS)
5.9.7. RS-232 UART (HPS)
5.9.8. Real-Time Clock (HPS)
5.9.9. SFP+
5.9.10. I2C Interface
5.9.11. FPGA General I/O Configuration
5.9.12. HPS SPIO Interface
Visible to Intel only — GUID: iga1438035661285
Ixiasoft
5.6.3. Reference Clock Source Selection
The HPS jumpers define the bootstrap options for the HPS—boot source, mode, HPS clocks settings, power-on-reset (POR) mode and peripherals selection.
Board Reference | Schematic Signal Name | Description |
---|---|---|
J17, J16 | OSC2_CLK_SEL [1:0] | Selects the source of OSC2 clock: 00—Select 25 MHz clock source 01—Select external source via SMA connector 10—Select 33 MHz on-board oscillator |
J30 | HPS voltage selection | Short—HPS core voltage is 0.95V Open—HPS core voltage is 0.9V |
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