Arria® 10 and Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) Interface for PCI Express* User Guide

ID 683724
Date 4/13/2024
Document Table of Contents

14.1. Overview of the Design Example

The Avalon® -MM Root Port design example includes the following modules:
  1. Arria® 10 PCIe Root Port DUT
  2. On-chip memory for RXM_BAR0
  3. Avalon® -MM clock-crossing bridge
  4. JTAG master bridge
  5. Small module for convenient pin assignments for the development kit
Figure 63. PCIe Avalon® -MM Root Port Design Example

After the design example is generated, a pcie_example_design.qpf and pcie_example_design.qsf files are generated along with a pcie_example_design.qsys file as shown in the directory structure. You can open the pcie_example_design.qpf project file in Quartus® Prime and directly run compilation.