Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) Interface for PCI Express* User Guide

ID 683724
Date 11/29/2023
Public
Document Table of Contents
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14.2.1. Simulating the Design Example

Below are the steps to run a simulation:
  1. Go to the testbench simulation directory.
  2. Run the simulation script for the simulator of your choice. Refer to the table below for more details.
  3. Analyze the results.
Table 81.  Steps to Run Simulation
Simulator Working Directory Instructions
ModelSim* <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/mentor/
  1. Invoke vsim
  2. do msim_setup.tcl
  3. ld_debug
  4. run -all
  5. A successful simulation ends with the following message, "Simulation passed"
VCS* <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/synopsys/vcs
  1. sh vcs_setup.sh USER_DEFINED_SIM_OPTIONS=""
  2. A successful simulation ends with the following message, "Simulation passed"
NCSim* <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/cadence
  1. sh ncsim_setup.sh USER_DEFINED_SIM_OPTIONS=""
  2. A successful simulation ends with the following message, "Simulation passed"
Xcelium* Parallel Simulator <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/xcelium
  1. sh xcelium_setup.sh USER_DEFINED_SIM_OPTIONS="" USER_DEFINED_ELAB_OPTIONS="-NOWARN\ CSINFI"
  2. A successful simulation ends with the following message, "Simulation passed"

Following is the partial transcript from a successful simulation of the Intel® Arria® 10 Avalon® -MM Root Port design example:

INFO:             865 ns  EP Link Speed change to:               Gen1
INFO:            4205 ns  EP LTSSM State: DETECT.ACTIVE
INFO:            5309 ns  EP LTSSM State: POLLING.ACTIVE
INFO:           18173 ns  EP LTSSM State: DETECT.QUIET
INFO:           18509 ns  EP LTSSM State: DETECT.ACTIVE
INFO:           19549 ns  EP LTSSM State: POLLING.ACTIVE
INFO:           20349 ns  RP Link Speed change to:               Gen1
INFO:           20377 ns  RP Link Speed change to:               0
INFO:           20605 ns  RP Link Speed change to:               Gen1
INFO:           23965 ns  RP LTSSM State: DETECT.ACTIVE
INFO:           28765 ns  RP LTSSM State: DETECT.QUIET
INFO:           32029 ns  RP LTSSM State: DETECT.ACTIVE
INFO:           32413 ns  EP LTSSM State: DETECT.QUIET
INFO:           35693 ns  EP LTSSM State: DETECT.ACTIVE
INFO:           36765 ns  EP LTSSM State: POLLING.ACTIVE
INFO:           36797 ns  RP LTSSM State: POLLING.ACTIVE
INFO:           39901 ns  EP LTSSM State: POLLING.CONFIG
INFO:           40317 ns  RP LTSSM State: POLLING.CONFIG
INFO:           41597 ns  RP LTSSM State: CONFIG.LINKWIDTH.START
INFO:           41821 ns  EP LTSSM State: CONFIG.LINKWIDTH.START
INFO:           42237 ns  EP LTSSM State: CONFIG.LINKWIDTH.ACCEPT
INFO:           42781 ns  RP LTSSM State: CONFIG.LINKWIDTH.ACCEPT
INFO:           43165 ns  RP LTSSM State: CONFIG.LANENUM.WAIT
INFO:           43709 ns  EP LTSSM State: CONFIG.LANENUM.WAIT
INFO:           44029 ns  EP LTSSM State: CONFIG.LANENUM.ACCEPT
INFO:           44189 ns  RP LTSSM State: CONFIG.LANENUM.ACCEPT
INFO:           44573 ns  RP LTSSM State: CONFIG.COMPLETE
INFO:        Start Enumeration Process
INFO:           45117 ns  EP LTSSM State: CONFIG.COMPLETE
INFO:           46621 ns  RP LTSSM State: CONFIG.IDLE
INFO:           47389 ns  EP LTSSM State: CONFIG.IDLE
INFO:           47581 ns  EP LTSSM State: L0
INFO:           47805 ns  RP LTSSM State: L0
INFO:           75005 ns  RP LTSSM State: RECOVERY.RCVRLOCK
INFO:           75869 ns  EP LTSSM State: RECOVERY.RCVRLOCK
INFO:           76637 ns  EP LTSSM State: RECOVERY.RCVRCFG
INFO:           78045 ns  RP LTSSM State: RECOVERY.RCVRCFG
INFO:           80285 ns  RP LTSSM State: RECOVERY.SPEED
INFO:           80509 ns  EP LTSSM State: RECOVERY.SPEED
INFO:           82345 ns  RP Link Speed change to:               Gen3
INFO:           82353 ns  RP LTSSM State: RECOVERY.RCVRLOCK
INFO:           82389 ns  EP Link Speed change to:               Gen3
INFO:           82397 ns  EP LTSSM State: RECOVERY.RCVRLOCK
INFO:           82933 ns  EP LTSSM State: RECOVERY.RCVRCFG
INFO:           83769 ns  RP LTSSM State: RECOVERY.RCVRCFG
INFO:           84377 ns  RP LTSSM State: RECOVERY.IDLE
INFO:           84997 ns  EP LTSSM State: RECOVERY.IDLE
INFO:           85093 ns  EP LTSSM State: L0
INFO:           85193 ns  RP LTSSM State: L0
INFO:           82345 ns  RP Link Speed change to:               Gen3
INFO:           82353 ns  RP LTSSM State: RECOVERY.RCVRLOCK
INFO:           82389 ns  EP Link Speed change to:               Gen3
INFO:           82397 ns  EP LTSSM State: RECOVERY.RCVRLOCK
INFO:           82933 ns  EP LTSSM State: RECOVERY.RCVRCFG
INFO:           83769 ns  RP LTSSM State: RECOVERY.RCVRCFG
INFO:           84377 ns  RP LTSSM State: RECOVERY.IDLE
INFO:           84997 ns  EP LTSSM State: RECOVERY.IDLE
INFO:           85093 ns  EP LTSSM State: L0
INFO:           85193 ns  RP LTSSM State: L0
INFO:        Finish Enumeration Process
TXS interface sent 12345678, received  12345678
TXS interface sent 89abcdef, received  89abcdef
TXS interface sent 5f5f5f5f, received  5f5f5f5f
TXS interface sent c1c1c1c1, received  c1c1c1c1
Simulation pass