Visible to Intel only — GUID: nik1410564966813
Ixiasoft
Visible to Intel only — GUID: nik1410564966813
Ixiasoft
A.4.1. Avalon‑MM Bridge TLPs
The PCI Express to Avalon‑MM bridge translates the PCI Express read, write, and completion Transaction Layer Packets (TLPs) into standard Avalon‑MM read and write commands typically used by master and slave interfaces. This PCI Express to Avalon‑MM bridge also translates Avalon‑MM read, write and read data commands to PCI Express read, write and completion TLPs. The following topics describe the Avalon‑MM bridges translations.
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