Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) Interface for PCI Express* User Guide

ID 683724
Date 11/29/2023
Public
Document Table of Contents

4.1. Hard IP Block Placement In Intel® Cyclone® 10 GX Devices

Intel® Cyclone® 10 GX devices include a single hard IP blocks for PCI Express. This hard IP block includes the CvP functionality for flip chip packages.
Figure 13.  Intel® Cyclone® 10 GX Devices with 12 Transceiver Channels and One PCIe Hard IP Block
Figure 14.  Intel® Cyclone® 10 GX Devices with 10 Transceiver Channels and One PCIe Hard IP Block
Figure 15.  Intel® Cyclone® 10 GX Devices with 6 Transceiver Channels and One PCIe Hard IP Block

Refer to the Intel® Cyclone® 10 GX Device Transceiver Layout in the Intel® Cyclone® 10 GX Transceiver PHY User Guide for comprehensive figures for Intel® Cyclone® 10 GX devices.