Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon® Streaming Interface for PCI Express* User Guide

ID 683647
Date 6/03/2021
Public
Document Table of Contents

3.10. Example Designs

Table 25.  Example Designs

Parameter

Value

Description

Available Example Designs

PIO

When you select the PIO option, the generated design includes a target application including only downstream transactions.

The PIO design example is the only option for the Avalon® -ST interface.

Simulation On/Off When On, the generated output includes a simulation model.
Synthesis On/Off When On, the generated output includes a synthesis model.
Generated HDL format

Verilog/VHDL

Verilog HDL and VHDL are supported

Select Board

Intel® Arria® 10 FPGA GX Development Kit

Intel® Arria® 10 FPGA GX Development Kit ES2

None

Specifies the Intel® Arria® 10 development kit.

Select None to download to a custom board.

Note: Currently, you cannot target an Intel® Cyclone® 10 GX Development Kit when generating an example design.

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