2.7. Designing with Low-Level Primitives
With the Intel® Quartus® Prime software, you can use low-level HDL design techniques to force a specific hardware implementation that can help you achieve better resource utilization or faster timing results.
Low-level primitives allow you to use the following types of coding techniques:
- Instantiate the logic cell or LCELL primitive to prevent Intel® Quartus® Prime Standard Edition integrated synthesis from performing optimizations across a logic cell
- Create carry and cascade chains using CARRY, CARRY_SUM, and CASCADE primitives
- Instantiate registers with specific control signals using DFF primitives
- Specify the creation of LUT functions by identifying the LUT boundaries
- Use I/O buffers to specify I/O standards, current strengths, and other I/O assignments
- Use I/O buffers to specify differential pin names in your HDL code, instead of using the automatically-generated negative pin name for each pair
For details about and examples of using these types of assignments, refer to the Designing with Low-Level Primitives User Guide.
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