Intel® Quartus® Prime Standard Edition User Guide: Design Recommendations

ID 683323
Date 9/24/2018
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Document Table of Contents

1.6. Recommended Design Practices Revision History

The following revision history applies to this chapter:

Document Version Intel® Quartus® Prime Version Changes
2018.09.24 18.1.0
  • Initial release in Intel Quartus Prime Standard Edition User Guide.
  • Created subtopic: Clock Region Assignments in Intel Arria 10 and Older Device Families from content in topic: Use Clock Region Assignments to Optimize Clock Constraints.
2017.11.06 17.1.0
  • Updated topic: Optimizing Timing Closure.
2016.05.03 16.0.0
  • Replaced Internally Synchronized Reset code sample with corrected version.
  • Stated limitations about deprecated physical synthesis options.
  • Clarified limitations of support for Design Assistant.
2015.11.02 15.1.0
  • Changed instances of Quartus II to Quartus Prime.
2014.12.15 14.1.0 Updated location of Fitter Settings, Analysis & Synthesis Settings, and Physical Optimization Settings to Compiler Settings.
June 2014 14.0.0 Removed references to obsolete MegaWizard Plug-In Manager.
November 2013 13.1.0 Removed HardCopy device information.
May 2013 13.0.0

Removed PrimeTime support.

June 2012 12.0.0 Removed survey link.
November 2011 11.0.1 Template update.
May 2011 11.0.0 Added information to Reset Resources .
December 2010 10.1.0
  • Title changed from Design Recommendations for Altera Devices and the Quartus II Design Assistant.
  • Updated to new template.
  • Added references to Quartus II Help for “Metastability” on page 9–13 and “Incremental Compilation” on page 9–13.
  • Removed duplicated content and added references to Help for “Custom Rules” on page 9–15.
July 2010 10.0.0
  • Removed duplicated content and added references to Quartus II Help for Design Assistant settings, Design Assistant rules, Enabling and Disabling Design Assistant Rules, and Viewing Design Assistant reports.
  • Removed information from “Combinational Logic Structures” on page 5–4
  • Changed heading from “Design Techniques to Save Power” to “Power Optimization” on page 5–12
  • Added new “Metastability” section
  • Added new “Incremental Compilation” section
  • Added information to “Reset Resources” on page 5–23
  • Removed “Referenced Documents” section
November 2009 9.1.0
  • Removed documentation of obsolete rules.
March 2009 9.0.0
  • No change to content.
November 2008 8.1.0
  • Changed to 8-1/2 x 11 page size
  • Added new section “Custom Rules Coding Examples” on page 5–18
  • Added paragraph to “Recommended Clock-Gating Methods” on page 5–11
  • Added new section: “Design Techniques to Save Power” on page 5–12
May 2008 8.0.0
  • Updated Figure 5–9 on page 5–13; added custom rules file to the flow
  • Added notes to Figure 5–9 on page 5–13
  • Added new section: “Custom Rules Report” on page 5–34
  • Added new section: “Custom Rules” on page 5–34
  • Added new section: “Targeting Embedded RAM Architectural Features” on page 5–38
  • Minor editorial updates throughout the chapter
  • Added hyperlinks to referenced documents throughout the chapter