Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.10.360. UNFORCE_MERGE_PLL_OUTPUT_COUNTER

Prevents the specified PLL output counter to be merged with the master PLL output counter. Use this option only for two compatible PLLs driven by the same clock source.

Type

Boolean

Device Support

  • Arria V
  • Arria V GZ
  • Cyclone V
  • Stratix V

Notes

This assignment supports Fitter wildcards.

This assignment is included in the Fitter report.

Syntax


		set_instance_assignment -name UNFORCE_MERGE_PLL_OUTPUT_COUNTER -to <to> -entity <entity name> <value>