Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.8.36. EDA_RTL_SIM_MODE

Enables the Advanced Options - VHDL or Verilog Simulation options for Test Bench mode or Command/macro mode.

Type

Enumeration

Values

  • COMMAND_MACRO_MODE
  • NOT_USED
  • TEST_BENCH_MODE

Device Support

This setting can be used in projects targeting any Altera device family.

Syntax


		set_global_assignment -name EDA_RTL_SIM_MODE -section_id <section identifier> <value>
		set_global_assignment -name EDA_RTL_SIM_MODE -entity <entity name> -section_id <section identifier> <value>
	

Default Value

NOT_USED, requires section identifier