Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.10.69. DEVICE_INITIALIZATION_CLOCK

Specifies the clock source for device initialization (the duration between CONF_DONE signal went high and before INIT_DONE signal goes high). In 20nm or prior device families, three options are available when AS x1 or AS x4 configuration mode is not selected, which are Internal Oscillator (default value), DCLK pin, and CLKUSR pin; For AS x1 or AS x4 configuration mode, you can select either the Internal Oscillator or CLKUSR pin only. The DCLK pin is an illegal option for AS mode. In 14 nm family, only Internal Oscillator or OSC_CLK_1 pins are available.

Type

Enumeration

Values

  • INIT_CLKUSR
  • INIT_DCLK
  • INIT_INTOSC
  • OSC_CLK_1_100MHZ
  • OSC_CLK_1_125MHZ
  • OSC_CLK_1_25MHZ

Device Support

  • Arria 10
  • Arria V
  • Arria V GZ
  • Cyclone V
  • Stratix V

Notes

This assignment is included in the Fitter report.

Syntax


		set_global_assignment -name DEVICE_INITIALIZATION_CLOCK <value>
	

Default Value

INIT_INTOSC

Example


		set_global_assignment -name DEVICE_INITIALIZATION_CLOCK "CLKUSR"
	

See Also

USER_START_UP_CLOCK