Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.10.137. FORCE_MERGE_PLL_FANOUTS

Forces the fanouts of the slave PLL clock output to be merged into the master PLL clock output. This option should be used only for static PLL clock outputs.

Type

Boolean

Device Support

  • Arria GX
  • Arria II GX
  • Arria II GZ
  • Cyclone 10 LP
  • Cyclone III
  • Cyclone III LS
  • Cyclone IV E
  • Cyclone IV GX
  • HardCopy II
  • HardCopy III
  • HardCopy IV
  • MAX 10
  • Stratix II
  • Stratix II GX
  • Stratix III
  • Stratix IV

Notes

This assignment supports Fitter wildcards.

This assignment is included in the Fitter report.

Syntax


		set_instance_assignment -name FORCE_MERGE_PLL_FANOUTS -from <from> -to <to> -entity <entity name> <value>