Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.2.160. VERILOG_MACRO

Defines Verilog HDL macro - same as `define directive

Type

String

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

The value of this assignment is case sensitive.

Syntax


		set_global_assignment -name VERILOG_MACRO <value>