Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.7.35. HCPY_PLL_MULTIPLE_CLK_NETWORK_TYPES

Direct Design Assistant to detect PLL that feeds multiple clock network types.

Type

Boolean

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

None

Syntax


		set_global_assignment -name HCPY_PLL_MULTIPLE_CLK_NETWORK_TYPES <value>