Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.7.16. DRC_DEADLOCK_STATE_LIMIT

Specifies the maximum number of states that you want the Design Assistant to detect as a deadlock condition. A larger number will results in longer processing time.

Type

Integer

Device Support

This setting can be used in projects targeting any Altera device family.

Syntax


		set_global_assignment -name DRC_DEADLOCK_STATE_LIMIT <value>
	

Default Value

2