PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 4/01/2024
Document Table of Contents Calibration Guidelines

The PHY Lite for Parallel Interfaces Stratix® 10 FPGA IP allows you to dynamically reconfigure the features of the interface. However, performing calibration is an application specific process. This section provides some general guidelines for calibrating Stratix® 10 I/O architecture.

Note: Follow the guidelines when generating your own dynamic reconfiguration controller.