External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 3/29/2021

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4.14. sideband2

address=45(32 bit)

Field Bit High Bit Low Description Access
mmr_zqcal_long_req 0 0

Long ZQ calibration request. Asserting this bit sends a ZQ calibration command to the memory device. This is a self-clearing bit, the controller sets this bit back to 0 when the command is executed.