External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 3/29/2021

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Document Table of Contents cal_debug for LPDDR3

Calibration debug interface

Table 66.  Interface: cal_debugInterface type: Avalon Memory-Mapped Slave
Port Name Direction Description
cal_debug_waitrequest Output Wait-request is asserted when controller is busy
cal_debug_read Input Read request signal
cal_debug_write Input Write request signal
cal_debug_addr Input Address for the read/write request
cal_debug_read_data Output Read data
cal_debug_write_data Input Write data
cal_debug_byteenable Input Byte-enable for write data
cal_debug_read_data_valid Output Indicates whether read data is valid