External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 3/29/2021
Document Table of Contents clks_sharing_slave_in for LPDDR3

Core clocks sharing slave input interface

Table 62.  Interface: clks_sharing_slave_inInterface type: Conduit
Port Name Direction Description
clks_sharing_slave_in Input This port should be connected to the core clocks sharing master.

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