External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP User Guide

ID 683663
Date 3/29/2021
Public
Document Table of Contents

4.1.1.24. clks_sharing_slave_out for DDR3

Core clocks sharing slave output interface

Table 32.  Interface: clks_sharing_slave_outInterface type: Conduit
Port Name Direction Description
clks_sharing_slave_out Output This port may be used to fanout to another core clocks sharing slave. Alternatively, the master can fanout to all slaves.

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