Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 10/12/2023
Document Table of Contents
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4.2.9. PHY Loopback

In PCS variations with embedded PMA targeting devices with GX transceivers, you can enable loopback on the serial interface to test the PCS and embedded PMA functions in isolation of the PMD. To enable loopback, set the sd_loopback bit in the PCS control register to 1.

The serial loopback option is not supported in Cyclone® IV devices with GX transceiver.

Figure 34. Serial Loopback